Hello my name is Rahul Ramaswami and I am currently a Sr. Design engineer at Silicon Labs.

I have over 10 years of design verification experience and extensive knowledge of C/C++, UVM, and testbench development.

My previous work experience includes working AMD, Intel, and Cisco.

Technical experience includes:

  • UVM/UVM_RAL
  • JEDEC DDR4/LPDDR4/DDR5/LPDDR5 standards
  • DFI standard
  • Scripting (Perl, Python)
  • Test bench development using C/C++/SystemVerilog.
  • Object Oriented Programming
  • Test plan development
  • Computer architecture

In my spare time I enjoy hiking, traveling, playing boccee ball, volunteering with the NSA, and website development.

If you have any questions, comments, or suggestions please don't hesitate to contact me.